Senior Design Engineer - DSP Logic Design

We are looking to add to our team an individual with the ability to interpret DSP system specifications and efficiently create well-documented DSP logic.

Requirements

• Responsible for high-speed multimillion-gate and multi-clock domain FPGA designs.
• 4+ years of FPGA/ASIC/SOC design experience.
• DSP and image processing expertise.
• Expertise in both fixed point and floating point binary arithmetic, including the use of Matlab for modeling DSP systems using fixed point and floating point arithmetic.
• Experience in translation of system requirements into a parameterized, modular, scalable, hardware architecture and design which can be reused for future projects.
• Functional verification experience with large and complex chips.
• Responsible for designing from initial specifications to silicon.
• Experience with Xilinx FPGAs, embedded multi-processor interface architectures, Verilog/VHDL RTL design, verification, FPGA synthesis/timing, lab validation planning/execution.
• Experience in test methodologies, test plan, regression, directed and random tests, and test bench development.
• Knowledge and experience in the area of high-speed DSP architectures, including techniques such as pipelining and parallel processing.
• Min Educational Requirements BS in EE. An MS or Ph.D. in EE preferred.

If you have these qualifications and are interesting in joining a fast paced engineering firm, please send your resume to DE Careers.