Local resources

•  DE Releases FFT_PIPE IP Cores for Xilinx FPGAs
•  Chip Design Magazine Article
•  BCD Math
•  UltraLong FFT IP Success
•  DE Releases Mixed Radix FFT IP Cores for Xilinx FPGAs
•  DE Releases UltraLong FFT IP Cores for Xilinx FPGAs
•  FPLIC Single Precision Zip
•  FPLIC Narrow Precisoin Zip
•  FPLIC Single Precision Archive
•  FPLIC Narrower Precision Archive
•  gen_ise_sh_py
•  FPGA Webcast
•  FFT Datasheet
•  HPEC 2004 Presentation
•  FPGAs Go, Go, Go
•  AES Datasheet
•  Floating Point FFT Factsheet
•  FFT Success
•  FPLIC Specification
•  HPEC 2003 Presentation
•  Welcome
•  Design Services for FPGA and ASIC Systems
•  Applications
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•  Why hire DE?
•  When to hire DE?
•  Fast Fourier Transform (FFT) IP Cores for FPGA and ASIC
•  Parallel Butterfly FFT
•  Other IP Cores
•  Floating Point Library IP Core
•  FPLIC Riviera Evaluation
•  FPLIC ParaCore Parameters
•  FFT/IFFT ParaCore Parameters
•  Inferring Block RAM vs. Distributed RAM in XST and Precision
•  gen_ise_sh
•  deModel