Staff Engineer Hired

Jeremy Paatela joins Dillon Engineering, Inc. as Staff Engineer to help meet the growing needs of our clients applying FPGAs and ASICs to High Performance Embedded Computing (HPEC) applications.

Jeremy's career includes positions at General Dynamics Advanced Information Systems, Terago Communications and NEO Networks, where he developed his skills in ASIC and FPGA logic design, embedded hardware architecutres, and system engineering.

Jeremy has a diverse digital design engineering background, including cutting edge DSP applications, networking and telecommunications, and embedded CPU designs for commercial, avionics and space systems. He has extensive HPEC experience and will head our reconfigurable computing group serving both commercial and DoD clients.

"Jeremy's expertise utilizing FPGAs and ASICs for HPEC applications will further enhance Dillon Engineering's ability to deliver the most advanced solutions to our clients", reports Dillon Engineering President, Tom Dillon.

Jeremy earned his Bachelor of Science degree from the University of Minnesota with a concentration in digital design and DSP applications.

Dillon Engineering, Inc., a eighteen year old electronic design firm delivering real-time DSP processing in FPGAs and ASICs, welcomes Jeremy.