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18 items matching your criteria.
- AES Crypto IP [1%] by superuser, 2007-05-29 03:42
- AES encryption/decryption IP.
- FPLIC Narrower Precision Archive [1%] by superuser, 2006-05-15 18:26
- FPLIC mantissa width 16 and exponent width 6 precision libray for evaluation with Riviera.
- FPLIC Narrow Precisoin Zip [1%] by superuser, 2006-05-15 18:24
- FPLIC mantissa width 16 and exponent width 6 precision libray for evaluation with Riviera.
- FPLIC Single Precision Zip [1%] by superuser, 2006-05-15 18:24
- FPLIC single precision evaluation library for use with Riviera.
- Floating Point IP [1%] by superuser, 2007-05-29 03:40
- A set of parametized IEEE 754 floating point modules.
- FFT IP [1%] by superuser, 2007-06-20 05:27
- World's fastest and most versitle FFT/IFFT IP Cores.
- ParaCore Architect IP Generation [1%] by superuser, 2007-06-07 08:14
- ParaCore Architect facalitates the development of structured IP.
- Other IP Cores [1%] by superuser, 2007-05-14 05:50
- Other IP Cores available from Dillon Engineering.
- Services [1%] by superuser, 2007-06-20 05:33
- Design Services for FPGA/ASIC Systems.
- Floating Point Modules Evaluation Available [1%] by superuser, 2007-04-26 06:44
- DE has released for immediate download evaluation libraries for Aldec Riviera simulation of its Floating Point Library IP Core (FPLIC).
- FPLIC Single Precision Archive [1%] by superuser, 2006-05-15 18:25
- FPLIC single precision libray for evaluation with Riviera.
- Mentor User2User 2005 [1%] by superuser, 2005-04-11 08:56
- The 2005 Mentor Graphics International User2User Conference will be held April 27th to 29th in Santa Clara, CA. Tom Dillon, President of Dillon ...
- HowTo [1%] by superuser, 2006-05-12 06:56
- How-To documents to help you through everyday situations designing DSP logic for FPGAs and ASICs.
- Xilinx Partner Forum [1%] by superuser, 2004-10-10 16:10
- Dr. Tracy Denk attend the 2004 Xilinx Partner Forum in San Jose, CA.
- Chip Design Magazine Article [1%] by superuser, 2007-04-26 06:44
- DE featured in Chip Design Magazine.
- Docs [1%] by superuser, 2004-08-30 17:41
- Dillon Engineering web documents.
- DE at HPEC 2004 [1%] by superuser, 2004-09-15 19:00
- Dillon Engineering is presenting "An Efficient Architecture for Ultra Long FFTs in FPGAs and ASICs" at HPEC 2004. HPEC 2004 is held at MIT Lincoln ...
- AES Cryto IP Released [1%] by superuser, 2007-04-26 06:44
- Dillon Engineering releases AES Crypto IP Core.
DE Releases Mixed Radix FFT IP Cores for Xilinx FPGAs