ParaCore Architect
ParaCore Architect™, which has been developed over a number of years, facilitates the design of highly parameterized IP Cores. The process begins by creating source file containing a highly parameterized description of the design at an extremely high level of abstraction. ParaCore Architect takes this description, combines it with parameter values specified by the user, and generates an equivalent HDL representation. The resulting HDL is guaranteed suitable for use with any simulation and synthesis environment, so it isn’t necessary to run any form of HDL rule checking program.
The beauty of this type of highly parameterized representation is that it’s extremely easy to target it toward a new application or an alternative device.
For further details about this state-of-the-art tool, please visit the ParaCore Architect Design Flow and Design Example pages.
The beauty of this type of highly parameterized representation is that it’s extremely easy to target it toward a new application or an alternative device.
For further details about this state-of-the-art tool, please visit the ParaCore Architect Design Flow and Design Example pages.